Microchip Mikrocontroller PIC32MZ microAptiv CPU 32bit SMD 2,048 MB LQFP 176-Pin 200MHz 640 kB RAM USB

Familie = PIC32MZ
Gehäusegröße = LQFP
Montage-Typ = SMD
Pinanzahl = 176
Gerätekern = microAptiv CPU
Datenbus-Breite = 32bit
Programmspeicher-Größe = 2,048 MB
Grenzfrequenz = 200MHz
RAM Speicher-Größe = 640 kB
USB-Kanäle = 1
Anzahl der PWM-Einheiten = 0
Anzahl der SPI-Kanäle = 6
Anzahl der UART-Kanäle = 6
LIN-Kanäle = 0

Die Serie PIC32MZ DA bietet eine Leistung wie ein MPU mit dem einfachen Design eines MCU für GUI-Designs durch seinen 2 MB großen Flash-Speicher und 640 KB SRAM, auf dem Chip verfügbar, 32 MB oder 128 MB extern adressierbaren DDR2 DRAM, integrierten Grafik-Controller, Grafik-Prozessor, 200 MHz Geschwindigkeit, 12 bit 18 MS/s ADC-Modul mit bis zu 45 analogen Eingängen, CAN und HS USB.200 MHz/330 DMIPS, MIPS32 microAptiv core Dual Panel Flash for live update support 12-bit, 18 MSPS, 45-channel ADC module Memory Management Unit for optimum embedded OS execution microMIPS mode for up to 35% code compression CAN, UART, I2C, PMP, EBI, SQI & Analog Comparators SPI/I2S interfaces for audio processing and playback Hi-Speed USB Device/Host/OTG 10/100 Mbps Ethernet MAC with MII and RMII interface Crypto Engine with a RNG for data encryption/decryption and authentication (AES, 3DES, SHA, MD5, and HMAC) Advanced Memory Protection Peripheral and memory region access control Temperature Range - 40°C to 85°C, - 40°C to 105°C (planned) Microcontroller Features Operating voltage range of 2.3V to 3.6V 2MB Flash memory (plus an additional 160 KB of Boot Flash) 640KB SRAM memory microMIPS mode for up to 35% smaller code size DSP-enhanced core: Four 64-bit accumulators Single-cylce MAC, saturating and fractional math IEEE 754-compliant Code-efficient (C and Assembly) architecture Power Management Various power management options for extreme power reduction (VBAT, Deep Sleep, Sleep and Idle) Deep Sleep current: < 1μA (typical) Integrated POR and BOR Programmable High/Low-Voltage Detect (HLVD) on VDDIO and High-Voltage Detect (HVD) on VDDR1V8 Clock Management Programmable PLLs and oscillator clock sources Dedicated PLL for DDR2 Fail-Safe Clock Monitor Independent Watchdog and Deadman Timers Fast wake-up and start-up Peripheral Features Internal DDR2 SDRAM interface (up to DDR2-400) with onboard 32MB SDRAM 50 MHz SD/SDIO/eMMC bus interface 50 MHz External Bus Interface (EBI) 80 MHz Serial Quad Interface (SQI) Peripheral Pin Select (PPS) functionality to enable function remap Up to 8 channels of hardware DMA with automatic data size detection Six UART modules (25 Mbps): Supports LIN 1.2 and IrDA protocols Two CAN modules 2.0B Active with DeviceNet addressing support Six 4-wire SPI modules (80 Mbps) SQI configurable as an additional SPI module (50 MHz) Five I2C modules (up to 1 Mbaud) with SMBus support Parallel Master Port (PMP) Hardware Real-Time Clock and Calendar (RTCC) module Nine 16-bit Timers/Counters (four 16-bit pairs combine to create four 32-bit timers) Nine Input Capture (IC) and Nine Output Compare(OC)/PWM outputs Graphics Features 3-layer Graphics Controller with up to 24-bit color support High-performance 2D Graphics Processing Unit (GPU) Audio Features Audio data communication: I2S, LJ, RJ, USB Audio data control interface: SPI and I2C™ Audio data master clock: Fractional clock frequencies with USB synchronization Advanced Analog Features 12-bit ADC Module: 18Msps rate with six Sample and Hold (S&H) circuits (five dedicated and one shared) Up to 45 analog inputs Can operate during sleep and idle modes Multiple trigger sources Six digital comparators and six digital filters Two comparators with 32 programmable voltage references Temperature sensor with ±2°C accuracy Charge Time Measurement Unit (CTMU) Qualification and Class B Support AEC-Q100 REVG (Grade 2 -40oC to +105oC) (Planned) Class B Safety Library, IEC 60730 Back-up internal oscillator Debugger Development Support In-circuit and in-application programming 4-wire MIPS® Enhanced JTAG interface Unlimited program and 12 complex data breakpoints IEEE 1149.2-compatible (JTAG) boundary scan Non-intrusive hardware-based instruction trace Integrated Software Libraries and Tools MPLAB Harmony – PIC32 software development framework C/C++ compiler with native DSP/fractional and FPU support TCP/IP, USB, Graphics, and mTouch middleware MFi, Android, and Bluetooth audio frameworks RTOS Kernels, Express Logic ThreadX FreeRTOS, OPENRTOS, Micriμm, μC/OS and SEGGER embOS